2025, Vol. 6, Issue 2, Part A
Graph theory applications in circuit design and optimization
Author(s): Arun Patel, Sita Kumari and Ravi Shrestha
Abstract: Graph theory, a key area of discrete mathematics, provides essential tools for analysing and optimising complex systems, including electrical circuits. In the context of circuit design, the application of graph-theoretic methods enables the formal representation of circuit topologies, offering a structured approach to tackle optimisation challenges such as interconnect minimisation, timing closure, resource allocation, and layout compactness [1, 2]. This research explores the use of graph theory in circuit design and optimisation, focusing on the practical integration of algorithms like minimum spanning tree (MST), shortest path, and graph colouring to optimise key design metrics such as area, power consumption, signal delay, and interconnect length [3, 4]. By representing circuit components as nodes and interconnections as edges, graph theory allows for the efficient analysis and optimisation of circuit designs, improving both performance and reliability [5, 6]. The research demonstrates that circuits optimised through graph-theoretic frameworks achieve measurable improvements compared to traditional heuristic methods, with a reduction in area (21.4%), power consumption (15.7%), signal delay (17.0%), and interconnect length (22.9%) [7, 8]. The hypothesis that graph-based optimisation methods can significantly enhance circuit design is supported by the results, which indicate that graph-based approaches offer a more systematic and mathematically grounded method for achieving optimal circuit configurations [9, 10]. The research further discusses the integration of graph algorithms into existing circuit design workflows, providing practical recommendations for enhancing electronic design automation (EDA) tools [11, 12]. The research concludes that graph-theoretic optimisation methods hold significant potential for the next generation of circuit design, enabling more efficient, compact, and power-efficient systems [13, 14].
DOI: 10.22271/27084531.2025.v6.i2a.100
Pages: 38-43 | Views: 93 | Downloads: 43
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How to cite this article:
Arun Patel, Sita Kumari, Ravi Shrestha. Graph theory applications in circuit design and optimization. Int J Res Circuits Devices Syst 2025;6(2):38-43. DOI: 10.22271/27084531.2025.v6.i2a.100
