2025, Vol. 6, Issue 1, Part A
| Title and Authors Name |
|---|
AI-Driven BP neural network approaches for enhancing analog circuit efficiency using simulation-based training and genetic optimization Matías González, Valentina Rojas and Joaquín Pérez Int. J. Res. Circuits Devices Syst., 2025; 6(1): 01-06 |
Advanced multidimensional factor models incorporating high-precision sensor arrays and optimization techniques for accurate 3-D near-field source parameter estimation Amina El Mansouri, Youssef Benkacem and Fatima Zahra Boussaid Int. J. Res. Circuits Devices Syst., 2025; 6(1): 07-11 |
Adaptive beamforming using enhanced steering vector estimation with subspace-based interference suppression and validation on real-world and simulated datasets Tafadzwa Nyamandi, Rutendo Dube and Mandla Chikomo Int. J. Res. Circuits Devices Syst., 2025; 6(1): 12-16 |
A novel CMOS bandgap reference with curvature correction using subthreshold MOSFETS for enhanced thermal stability and low-power applications Ahmed Al-Tamimi, Rana Hassan Jassim and Saif Ali Karim Int. J. Res. Circuits Devices Syst., 2025; 6(1): 17-21 |
