International Journal of Research in Circuits, Devices and Systems
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P-ISSN: 2708-4531, E-ISSN: 2708-454X

2024, Vol. 5, Issue 1, Part A


Enhancing system-on-chip design with asynchronous regression modeling


Author(s): C Simonetti and Aline Merino

Abstract: System-on-Chip (SoC) designs are increasingly complex and power-hungry, demanding innovative approaches to improve efficiency and performance. This paper introduces a novel methodology for enhancing SoC design through asynchronous regression modeling (ARM), a technique that leverages non-linear regression models to predict and optimize SoC performance parameters asynchronously. By decoupling the prediction model's execution from the SoC's operational cycle, we demonstrate significant improvements in power efficiency, performance, and scalability of SoC designs.

Pages: 17-19 | Views: 370 | Downloads: 106

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International Journal of Research in Circuits, Devices and Systems
How to cite this article:
C Simonetti, Aline Merino. Enhancing system-on-chip design with asynchronous regression modeling. Int J Res Circuits Devices Syst 2024;5(1):17-19.
International Journal of Research in Circuits, Devices and Systems
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